Processors, memory devices, imagers and other types of microelectronic devices are often manufactured on semiconductor workpieces or other types of workpieces. In a typical application, several individual dies (e.g., devices) are fabricated on a single workpiece using sophisticated and expensive equipment and processes. Individual dies generally include an integrated circuit and a plurality of bond-pads coupled to the integrated circuit. The bond-pads provide external electrical contacts on the die through which supply voltage, signals, etc., are transmitted to and from the integrated circuit. The bond-pads are usually very small, and they are arranged in an array having a fine pitch between bond-pads. The dies can also be quite delicate. As a result, after fabrication, the dies are packaged to protect the dies and to connect the bond-pads to another array of larger terminals that is easier to connect to a printed circuit board.
Conventional processes for packaging dies include electrically coupling the bond-pads on the dies to an array of pins, ball-pads, or other types of electrical terminals, and then encapsulating the dies to protect them from environmental factors (e.g., moisture, particulates, static electricity, and physical impact). In one application, the bond-pads are electrically connected to contacts on an interposer substrate that has an array of ball-pads. For example, FIG. 1A schematically illustrates a conventional packaged microelectronic device 6 including a microelectronic die 10, an interposer substrate 60 attached to the die 10, a plurality of wire-bonds 90 electrically coupling the die 10 to the interposer substrate 60, and a casing 70 protecting the die 10 from environmental factors.
Electronic products require packaged microelectronic devices to have an extremely high density of components in a very limited space. For example, the space available for memory devices, imagers, processors, displays, and other microelectronic components is quite limited in cell phones, PDAs, portable computers, and many other products. As such, there is a strong drive to reduce the surface area or “footprint” of the microelectronic device 6 on a printed circuit board. Reducing the size of the microelectronic device 6 is difficult because high performance microelectronic dies 10 generally have more bond-pads, which result in larger ball-grid arrays and thus larger footprints. One technique used to increase the density of microelectronic dies 10 within a given footprint is to stack one microelectronic die on top of another.
FIG. 1B schematically illustrates another conventional packaged microelectronic device 6a having two stacked microelectronic dies 10a-b. The microelectronic device 6a includes a substrate 60a, a first microelectronic die 10a attached to the substrate 60a, a spacer 30 attached to the first die 10a with a first adhesive 22a, and a second microelectronic die 10b attached to the spacer 30 with a second adhesive 22b. The spacer 30 is a precut section of a semiconductor wafer. One drawback of the packaged microelectronic device 6a illustrated in FIG. 1B is that it is expensive to cut semiconductor wafers to form the spacer 30. Moreover, attaching the spacer 30 to the first and second microelectronic dies 10a-b requires additional equipment and steps in the packaging process.
To address these concerns, some conventional packaged microelectronic devices include an epoxy spacer, rather than a section of a semiconductor wafer, to space apart the first and second microelectronic dies 10a and 10b. The epoxy spacer is formed by dispensing a discrete volume of epoxy onto the first die 10a and then pressing the second die 10b downward into the epoxy. One drawback of this method is that it is difficult to position the second die 10b parallel to the first die 10a. As a result, microelectronic devices formed with this method often have “die tilt” in which the distance between the first and second dies varies across the device. If the second die 10b is not parallel to the first die 10a, but rather includes a “high side,” the wire-bonds on the high side may be exposed after encapsulation. Moreover, the “low side” of the second die may contact the wire-bonds electrically connecting the first die to the substrate. This can cause an electrical short that renders the device defective. Accordingly, there is a need to improve the process of packaging multiple dies in a single microelectronic device.